A GaN based Totem Pole Bridgeless Power Factor Correction Circuit

This work describes the analysis and design of a 250W Totem Pole Power Factor Correction (PFC) circuit with Gallium Nitride (GaN) based devices in the power stage. The solution uses a continuous conduction mode control approach with an analog controller which generates a single Pulse-Width Modulated (PWM) output. The paper addresses two challenges of using a standard analog controller without any external micro-controllers, Field Programmable Gate Arrays (FPGAs) and/or Digital Signal Processors (DSPs) in the control path for controlling the PFC. The first challenge is to generate the appropriate driving signals for the power stage devices and the second challenge is to appropriately sense the inductor current as required by the analog controller. This PWM output is then processed using external circuits to drive the slow and fast leg of the Totem Pole PFC topology. The fast leg of the power stage uses an integrated System-in-Package (SiP) with two 650V GaN High Electron Mobility Transistors (HEMT) in a Half Bridge configuration. The SiP includes dedicated gate drivers and all the protection required for GaN HEMT. The system requirements, design equations, simulation results, and experimental hardware prototype of the PFC are presented in this paper.