Electrostatic Performance Enhanced in a Graded Doped Junctionless Gate All Around MOSFET

In this article analysis the Graded doped Junctionless Gate All Around (GD-JGAA) MOSFETs and find that the electrostatic performance of the proposed devices GD-JGAA and compared to the JGAA MOSFET. As a result, find that the SS and DIBL are minimum in GD-JGAA MOSFET. So that the SCEs are reduced in GD-JGAA MOSFET as compared to JGAA MOSFET. Also find that the subthreshold current (IOFF) is minimal as well as the ION current also reduced. As a result, the ION/IOFF current ratio improved. So that the power delay performance increased in GD-JGAA MOSFET. So, that the device GD-JGAA MOSFET is most suitable for digital applications.