Power-to-Noise Optimization in the Design of Neural Recording Amplifier Based on Current Scaling, Source Degeneration Resistor, and Current Reuse

This article presents the design of a low-power, low-noise neural signal amplifier for neural recording. The structure reduces the current consumption of the amplifier through current scaling technology and lowers the input-referred noise of the amplifier by combining a source degeneration resistor and current reuse technologies. The amplifier was fabricated using a 0.18 μm CMOS MS RF G process. The results show the front-end amplifier exhibits a measured mid-band gain of 40 dB/46 dB and a bandwidth ranging from 0.54 Hz to 6.1 kHz; the amplifier’s input-referred noise was measured to be 3.1 μVrms, consuming a current of 3.8 μA at a supply voltage of 1.8 V, with a Noise Efficiency Factor (NEF) of 2.97. The single amplifier’s active silicon area is 0.082 mm2.