A Combined Analytical and Simulation-Based Methodology for Quantifying the Noise-Power-Area Trade-Offs in Biomedical Amplifiers

Low-noise operation is one of the most important performance criteria for low-power amplifiers targeting biopotential acquisition. While advanced circuit architectures exist to minimize the intrinsic noise, an analytical formalism is still lacking to estimate the lowest achievable noise level without performing extensive circuit-level optimizations. This work proposes a hybrid methodology mixing theoretical analyses and a limited number of simulations to estimate and minimize the input-referred noise and the noise efficiency factor of various biomedical amplifiers topologies. Compared to previous works, accurate bias-dependent noise models are obtained thanks to simulations of single devices and allow this methodology to successfully take into account the thermal and flicker noise sources from MOS transistors analytically. The optimal noise-current-area trade-off is then derived, showing the fundamental limits of the architecture. In this paper, the proposed methodology is applied to a current-reuse amplifier topology designed for two applications. The specifications for each application are obtained from a system-level perspective, including an input high-pass filter whose noise is considered analytically. Simulation-based optimization results show a good agreement with the analytical approach, proving that the methodology can be used for noise estimation, comparison between architectures, and to extract meaningful design guidelines.