4.4 A Highly-Integrated 6-Phase Cell-Reused Digital Transmitter Using 1/3 Duty-Cycle LO Signals for Harmonic Rejection

To fully benefit from advanced CMOS technologies, it is desirable to completely digitize the transmitter, which yields reduced die area, highly efficient operation and direct interface to digital baseband. However, the ever-increasing data demand with complex OFDM and wideband high-order modulation poses great challenges on transmitter output power, efficiency and linearity. The quadrature and polar digital transmitters (DTXs) are two types of widely-used architectures: the quadratur e DTX is suitable for wideband signals but the orthogonal vector combination limits output power and efficiency [1, 2]; the polar DTX has advantages of high output power and efficiency, but it requires extra design complexity of phase modulators and AM-PM synchronization [3, 4]. Moreover, the switch-based digital power amplifier (DPA) driven by square-wave LOs will generate significant unwanted odd harmonic components, where the 3 rd harmonic usually falls in the crowded sub-6GHz band and potentially interferes with other terminals. In this work, a 6-phase cell-reused DTX driven by 1/3 duty-cycle LO signals is proposed, which approaches the output power range of polar counterparts and realizes 18 efficiency peaks on the complex plane. By introducing a multi-phase injection-locked ring oscillator (ILRO) as an accurate, low-jitter and low-power solution for multi-phase LO generation (MPLG), this DTX achieves good 3 rd -order harmonic rejection (HR3) and linearity performance.