Sizing and short-circuit capability of a transformerless HVDC DC-DC converter

This work aims at optimizing the converter design of the double-T MMC DC-DC converter in terms of transmitted power per submodule and also in terms of transmitted power per silicon area, while, at the same time, providing the capability to block dc faults. Firstly, the converter operation is described and the optimal values of the inner ac and dc voltages that minimize device power rating are derived. Next, the submodule topology is analyzed and a thorough study on the converter capability for blocking fault currents is carried out, showing that the converter is able to isolate dc faults both at the input and at the output of the converter. Finally, the previous analytical study is verified by means of detailed PSCAD simulations. Copyright (c) 2020 IEEE. Personal use is permitted. For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org . The final version of record is available at http://dx.doi.org/10.1109/TPWRD.2020.2966751