New converter design improves efficiency, achieving over 95% efficiency in experimental tests with voltage multiplier cells.
A new high‐voltage gain DC‐DC converter topology based on the classic SEPIC converter with voltage multiplier cells (VM) and capacitor stacking at the circuit output is proposed. This converter basically combines two SEPIC converters with VM. In the input section of the converter, the input inductor and switch are shared. In the intermediate and output sections, the SEPIC converter cells operate independently. Finally, the output of each SEPIC converter is connected in a stacked manner, which guarantees a high voltage bus. In this way, the topology achieves some advantages such as single switch, low voltage stress on the switch, high voltage gain, and nonpulsating current at the input. To validate the proposed topology, some open‐loop experimental results were collected, and a prototype converter with 500 W of power and 50 V of input voltage was developed in the laboratory, which achieved a peak efficiency of over 95% for 300 W and 94% for 500 W.
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Muhongo et al. (2025) studied this question.
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