Optimization of area, power, and subsequent parameters of multiplexers in quantum cell automata technology

Quantum Cellular Automaton (QCA) technology is emerging as a promising alternative to complementary metal–oxide–semiconductor circuits for nanoscale, low-power computing. Multiplexers, being fundamental components in memory, arithmetic logic units (ALUs), and signal routing, require highly optimized designs. This paper proposes novel architectures of 2:1 and 4:1 QCA multiplexers with significant improvements over existing works. The proposed 4:1 multiplexer achieves a 60% reduction in area and a 76.7% reduction in power dissipation compared to the best previously reported design, while ensuring full logical correctness. These results are validated using QCADesigner-E simulations and coherence vector energy analysis. The findings highlight both the novelty and practical potential of the proposed QCA multiplexer designs for future low-power, high-density nano-computing applications.