Integration of a low-power memtransistor array improves efficiency in neuromorphic computing, reducing power dissipation.
Integrating sensing, memory, and computing functionalities on a single platform is gaining traction in pursuing next-generation energy- and area-efficient electronics, streamlining the integration complexity and enhancing the efficiency of dense electronic systems. Having biologically analogous functionality within a single programmable unit is crucial for neuromorphic computing; however, power dissipation remains a persistent challenge, which can be addressed by embracing steep-switching strategies as a mainstream solution. Here, we introduce a memtransistor architecture based on a filamentary conductive resistive switching mechanism, achieving abrupt-slope transistor performance that surpasses the "Boltzmann limit," with an ultralow subthreshold swing of 3.16 mV/dec over 5 dec, reduced leakage current (<100 fA/μm), and quasi-0D contact formation, enabling a high on/off current ratio (>2 × 10⁹). In gate-tunable nonvolatile memory mode, it achieves a large memory window (>10⁶) and long-term cycle endurance, with ultralow energy consumption (4.5 pJ). A versatile 16 × 4 visual information recognition and storage array with a pattern is developed, leveraging the photogating effect. The three-terminal multibit optic-neuromorphic system enables a light-modulated artificial synapse as an energy-conserving (femtojoule-level) solution for high-performance in-sensor, edge computing, and optic artificial neural network (OANN) applications. By unifying sensing, weight storage, and high-performance computation, this prototype establishes an energy-efficient computing framework with minimal latency and hardware overhead.
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Devnath et al. (2025) studied this question.
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