A Neural Recording IC for 64-Channel Time-Multiplexed MEA with 3.3-GΩ Total Input Impedance Using Dual Positive Feedback Loop Z IN -Boosting

This paper presents a 64-channel time-domain multiplexed (TDM) neural recording IC that achieves a high total input impedance (T-ZIN) for direct interfacing with a time-multiplexed microelectrode array (MEA). Unlike conventional IC-side multiplexing implementations, the proposed system performs multiplexing at the electrode side, creating a shared external parasitic path across channels and allows the dual positive feedback loop (DPFL) to use shared feedback capacitors and a single calibration code. The DPFL cancels both internal and external parasitics, thereby boosting T-ZIN. Thus, the proposed scheme eliminates parasitic mismatch and improves scalability and T-ZIN than prior works. Fabricated in a 180 nm CMOS process, the system implements 8 to 1 multiplexing per analog front end, achieves 3.3 GΩ T-ZIN at 10 Hz with 3 pF added external capacitance, and demonstrates saline-based spike recording with 6.66 $μ$VRMS input referred noise over 1 Hz to 10 kHz, while consuming 8.87 $μ$W per channel and 0.0619 mm² per channel.