This research demonstrates the influence of substrate temperature on charge transport and morphology in tellurium films, indicating engineering potential for nanoscale devices.
Tellurium (Te) has recently gained attention due to its unique one-dimensional helical chain crystal structure and promising optoelectronic and thermoelectric properties. In this study, we investigate the influence of substrate temperature (296 K-326 K) on the structural and electrical characteristics of ~20 nm Te films deposited via vacuum thermal evaporation on Si/SiO₂ substrates. Morphological analysis using atomic force microscopy (AFM) and high-resolution transmission electron microscopy (HRTEM) revealed correlation between the substrate temperature and the changes in the structure from trapezoidal to elongated stick-like features. Xray diffraction and Raman spectroscopy demonstrated that the Te chains were predominantly oriented parallel to the substrate surface at TS = 326 K. The chain length and packing density were dependent on TS. Spatially resolved current-voltage measurements show a strong temperaturedependent decrease of the in-plane charge transport, whereas higher-temperature films were characterized by an increased lateral resistance. Scanning Kelvin probe microscopy measurements further reveal surface potential differences of ~0.6 V between samples. These results demonstrate that small variations in substrate temperature can significantly modulate nanoscale morphology and electrical transport, providing a route to engineer Te-based thin-film devices with tailored performance.
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Bukauskas et al. (2025) studied this question.
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