A new BPM processor is being developed to address the ageing of BPM signal processors and the new demand for synchronised data acquisition at the storage ring of Shanghai Synchrotron Radiation Facility (SSRF). The BPM processor consists primarily of a digital carrier board and an analog front-end (AFE) module. The AFE is responsible for the conditioning of the BPM output RF signal and for the compensation of long-term drift. This paper presents the design of the AFE module and gives an evaluation of its performance. The experimental results show that the AFE module under development fully satisfies the high resolution and high stability requirements of the upgraded SSRF BPM processor.
Jiang et al. (Tue,) studied this question.