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Chronological analysis of chemical vapor deposition methods reveals gaps in insulation creation for integrated circuits, indicating evolving solutions.
The problems and chronology of the application of methods of chemical vapor deposition (CVD) of thin films based on silicon dioxide for the formation of insulating units of integrated circuits (ICs) with design and technology nodes of 500 - 14 nm are considered. The work consists of five parts. The first part discusses the issues of conformal growth of thin films on vertical elements of IC reliefs and high-quality void-free formation of “gap-fill” films in the gaps of the IC relief. Chronological changes in approaches to the selection of CVD processes of thin films for creating “surface trenches” and “pre-metal dielectric” IC units are shown. To compare the “gap-fill” capabilities of various CVD processes, the effectiveness of using the quantitative parameter “structure complexity, SC” proposed by the author and experimentally determined is shown. This parameter characterizes the critical conditions for void-free filling of trenches/holes of the IC relief with width Gcrit and height (depth) Hcrit according to the relation SCcrit = ARcrit/Gcrit, where ARcrit = Hcrit/Gcrit. A diagram is proposed that displays chronological forecast changes in the complexity of microelectronic elements and critical values for void-free filling of gaps in IC reliefs with deposited materials.
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Vladislav Yu. Vasilyev (2024) studied this question.
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