A framework automates compact model parameter extraction in semiconductor devices, indicating enhanced efficiency and accuracy.
As semiconductor technology node advances, the number of parameters in the modern device compact model increases drastically. Manual extraction of these model parameters becomes not only tedious but also impossible, and the automatic method is strongly desired. Traditional black-box optimization suffers from poor scalability due to the curse of dimensionality, while deep learning–based methods typically require large amounts of training data. To address these challenges, we propose CDRPE: a combined deep learning and self-attention enhanced reinforcement learning framework for automatically extracting a large set of DCM parameters across multiple electrical characteristics. The framework leverages a pre-trained multilayer perceptron to initialize core parameters, incorporates device physics knowledge to guide the search, and employs a self-attention–enhanced RL agent for efficient exploration in high-dimensional parameter spaces. Experimental results on BSIM4, BSIMSOI, and BSIMCMG demonstrate that CDRPE can automatically extract 100 parameters with root-mean-square error below 5% relative to TCAD and silicon data. Compared with existing methods, the proposed framework achieves a 7.7X speed up. Moreover, the generated models show good convergence in both digital and analog circuit simulations, exhibiting the potential of this framework for future practical applications.
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Xiao et al. (2026) studied this question.
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