What does this research mean for the field?

A novel compiler transformation for stencil-based finite-difference Fortran code reduces memory usage by 4.5 times and improves throughput by 9.7 times compared to the original code. Novelty: ClaimNovelty.NOVEL_FINDING. Consensus alignment: ConsensusAlignment.NEUTRAL.

What question did this study set out to answer?

The aim is to enhance performance and reduce memory usage of stencil-based Fortran code on FPGAs.

March 4, 2026International Journal of Parallel ProgrammingOpen Access

Optimising Stencil Code on FPGAs by Trading Data Movement for Compute using Compiler Rewrite Rules

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The aim is to enhance performance and reduce memory usage of stencil-based Fortran code on FPGAs.
Developed type-driven rewrite rules for stencil computations
Eliminated intermediate arrays using re-computation
Transformed stencil operations for better memory management
Evaluated on 2-D and 3-D stencil benchmarks
Demonstrated on the Large Eddy Simulator for Urban Flows
Achieved an average 2.5x reduction in DRAM usage
Increased DSP usage by 3.4x
Improved throughput by 25x
Reduced memory footprint by a factor of 4.5x in a real-world example
Achieved 9.7x speedup compared to original Fortran code

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Implication

Compiler transformations improve memory efficiency and throughput in stencil computations on FPGAs.

Cite This Study

Szafarczyk et al. (2026) studied this question.

synapsesocial.com/papers/69a7cd7ed48f933b5eed9d44 https://doi.org/10.1007/s10766-025-00809-z

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Optimising Stencil Code on FPGAs by Trading Data Movement for Compute using Compiler Rewrite Rules

Key Points

Discussion

Implication

Cite This Study

Optimising Stencil Code on FPGAs by Trading Data Movement for Compute using Compiler Rewrite Rules

Key Points

Discussion

Implication

Cite This Study

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