Topological Noise Folding for Scalable Quantum Error Mitigation

Quantum error mitigation is essential for achieving useful performance from near-term quantum hardware, yet existing approaches are limited by sampling overhead that scales exponentially with the number of noise channels. Here we introduce Topological Noise Folding (TNF), an AI-driven compilation framework combining graph neural networks with a neuro-symbolic loss function to discover noise-suppressing diagrammatic rewrites in ZX-calculus circuit representations. By enforcing Pauli flow constraints during optimization, the framework enables deterministic circuit extraction with empirical polynomial-time scaling. Evaluated across 81 benchmark circuits, TNF outperforms heuristic compilers in 98.8% of cases and achieves an average non-Clifford gate reduction of 19.7%. Experiments executed on a 156-qubit superconducting quantum processor demonstrate a measurable fidelity improvement for a six-qubit QAOA instance. These results show that topological circuit optimization can reduce effective sampling overhead and extend the practical computational reach of noisy quantum hardware.