Dynamic verification algorithm for collection errors of low-voltage wiring diagrams integrating deep learning and image matching

This article focuses on the problem of error checking of low-voltage wiring diagrams. Under the current situation of EPS (electric power system) development, the error of low-voltage wiring diagrams has a significant impact on power grid planning, operation and maintenance, and the limitations of traditional verification methods are prominent. Therefore, this article studies the integration of DL (deep learning) and image matching technology, and designs a dynamic checking algorithm for recording errors of low-voltage wiring diagrams. A feature extraction model based on CNN (Convolutional Neural Network) is constructed, combined with the improved SIFT (Scale Invariant Feature Transform) matching algorithm, and a dynamic verification process is designed. The experimental analysis shows that the algorithm is excellent in accuracy, and the accuracy is stable at around 95% after the quantity of tested images reaches 200. The recall rate of different types of errors is good, and the position deviation is 92%, the size error is about 90% and the angle error is 88%. In efficiency, the processing time of a single image increases slowly with the increase of resolution, and the batch processing has good scalability. In terms of robustness, in the face of 50% change of illumination intensity, the accuracy rate only drops by 3%, and the recall rate drops by about 5%, and it is also resistant to noise interference and image blur. It can be seen that this algorithm provides a reliable and effective solution for the error check of low-voltage wiring diagrams.