Hot-Carrier-Induced Electron Trapping in the Drift Region of N-Type LDMOS Devices at Deep-Cryogenic Temperatures

The growing demand for quantum computing applications requires reliable semiconductor devices operating at deep-cryogenic temperatures. While CMOS reliability at cryogenic temperatures has been extensively studied, high-voltage laterally-diffused metal-oxide semiconductor (LDMOS) devices required for quantum applications such as ion shuttling remain largely unexplored. This paper investigates the reliability of n-type LDMOS devices from room temperature down to the deep-cryogenic regime,focusing on hot-carrier degradation. At temperatures below 40 K, LDMOS devices exhibit a diode-like behavior in their output characteristics due to the freeze-out of charge carriers in the drift region. We demonstrate that electron trapping in shallow traps at the Si-SiO2 interface of the drift region significantly affects this behavior. We model this effect using an equivalent circuit consisting of a depletion MOSFET with floating gate for the drift region. This model is validated using a modified LDMOS device with an additional poly gate, allowing direct measurement of its threshold voltage shifts.