Robust and Compatible Ferroelectric Memories with Polycrystalline TiO ₂ Channel for 3D Integration

The demand for higher computing efficiency in the artificial intelligence era is driving the development of novel memory technologies for computing‐in‐memory (CIM) and monolithic 3D (M3D) integration. Ferroelectric field‐effect transistors employing oxide semiconductor (OS) channels (OS‐FeFETs) are a promising candidate, offering scalability and low‐power operation. However, their reliability has been fundamentally limited by the thermal and operational instability of conventional amorphous oxide channels. Recently, polycrystalline TiO 2 has emerged as a robust channel material that addresses these stability and compatibility challenges, showing great potential for ferroelectric memory 3D‐integration. This review comprehensively summarizes the progress in TiO 2 ‐channel FeFETs. We begin by discussing the material and interfacial characteristics of TiO 2 ‐based ferroelectric gate stacks, along with the physical mechanisms underpinning their superior stability. The device performance and multi‐dimensional stability are then quantitively benchmarked against other OS platforms. Furthermore, we review the novel device architectures benefiting from the TiO 2 channel, such as planar double‐gate and vertical‐channel FeFETs, engineered to leverage these material advantages for M3D integration. Finally, we outline the remaining challenges and future research directions concerning mobility, array‐level reliability, and integration pathways.