This investigation reveals how bonding configuration and material selection affect performance in SiC devices, indicating significant implications for high-power operations.
Wide Bandgap (WBG) semiconductors, particularly Silicon Carbide (SiC), have become pivotal in advancing high-efficiency, high-power-density systems. Cascode configurations, combining a high-voltage SiC JFET with a low-voltage Si MOSFET, enable Normally-OFF operation while leveraging SiC’s superior switching and thermal properties. However, co-packaging these devices introduces critical design challenges related to parasitic inductance, thermal management, and reliability. This study investigates the impact of bonding configuration and die-attach material selection on dynamic and thermal performance in SiC-based modules. Double Pulse Test (DPT) results reveal that direct bonding provides a better tradeoff between switching losses and dynamic operation stability, mitigating VDS overshoot, gate oscillation, and EMI risk, thereby improving switching stability under system-level stress. Conversely, indirect bonding increases inductance, amplifying oscillations and dynamic stress during turn-off events. Thermal analysis demonstrates that while system-level cooling dominates Rthja, the adoption of sintered silver (Ag) as a die-attach material achieves ~20% reduction in Rthjc, lowering junction temperatures and enhancing reliability for high-power applications. These findings underscore the importance of interconnect design and attach material optimization in achieving robust, high-efficiency operation of wide-bandgap devices.
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Byongjin et al. (2026) studied this question.
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