Strained Si/SiGe heterostructures are key enablers of high‐mobility and long spin‐coherence electron systems, making them essential for cryogenic electronic and spin qubit devices. The strain‐induced conduction band offset in these structures supports the vertical confinement of electrons, enabling the formation of a two‐dimensional electron gas (2DEG), a basic building block for gate‐defined quantum dot devices. However, high‐temperature processes during (Bi)CMOS fabrication, particularly contact formation, can relax the desired strain and thereby degrade electronic performance. In this work, we investigate the combined influence of sequential phosphorus ion implantation and rapid thermal annealing (RTA) on Si 0.67 Ge 0.33 /Si/Si 0.67 Ge 0.33 heterostructures processed in an industry‐standard 200 mm BiCMOS pilot line. By dividing a high‐dose phosphorus implant into multiple lower‐dose steps and optimizing the annealing conditions, we effectively suppress Si–Ge interdiffusion, thereby preserving strain and heterostructure integrity. To enhance homogeneity across the wafer, nickel silicide (NiSi) metallization is applied for contact formation. The resulting Hall bar‐shaped field‐effect transistors (HB‐FETs) exhibit reliable Ohmic behavior and a specific contact resistivity of 7.68 × 10 − 7 Ωcm 2 at 1.5 K. These results demonstrate a scalable, process‐compatible route to forming low‐resistance contacts in strained Si/SiGe heterostructures while maintaining the structural and electronic properties required for quantum device fabrication.
Fidorra et al. (Tue,) studied this question.