Examines harmonic distortion in VCO-ADCs, suggesting significant improvements via ML techniques.
This article introduces a machine-learning (ML)-driven co-design and optimization framework for open-loop analog linearization of VCO-ADCs, especially operating in the low supply-voltage (VDD) regime, and demonstrated on a new coupled-oscillator-ensemble (COE) circuit architecture. The high-dimensional optimization space associated with the embedded linearization tuning ‘knobs’ of the VCOs renders exhaustive transistor-level search infeasible. To address this challenge, a deep neural network (DNN) surrogate is trained on a compact set of transistor-level transient simulations capturing the COE’s composite voltage-to-frequency ( <tex-math notation="LaTeX">V </tex-math>-to- <tex-math notation="LaTeX">f </tex-math>) characteristics. This surrogate enables rapid exploration of the vast tuning-knob landscape and steers an evolutionary genetic algorithm (GA) toward configurations that optimize harmonic distortion (HD). To further enhance HD-prediction robustness and incorporate VDD variation awareness, the framework integrates advanced ML techniques. Monte Carlo (MC)–perturbed GA optimization improves resilience to parameter uncertainty, while a stacked-ensemble surrogate network, constructed from expert-VDD-specific base models fused with a hybrid encoder-combiner meta-learner, facilitates accurate VDD–aware predictions. The resulting optimized tuning settings are transferred to a Cadence simulation environment for transistor-level verification of the VCO–ADC, achieving a mean third-order harmonic distortion ( <tex-math notation="LaTeX">HD₃ </tex-math>) of 55 dB. Across a wide 0.4—0.6 V supply range ( <tex-math notation="LaTeX">≈ 40% </tex-math> variation), <tex-math notation="LaTeX">HD₃ </tex-math> remains above 50 dB through the DNN’s supply-adaptive dynamic programming of the tuning-knob values.
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Nguyen et al. (2026) studied this question.
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