We have successfully integrated a 2-stack 8×8 array 1D-1R(one diode-one resistor) structure with 0.5um×0.5um cells in order to demonstrate the feasibility of high density stacked RRAM. p-CuO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">X</inf> /n-InZnO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">X</inf> heterojunction thin film was used for the first time as a oxide diode which shows increased current density of two orders over our previous p-NiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</inf> /n-TiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</inf> oxide diode. And Ti-doped NiO was used for the storage node. No limitation to the number of stacks has been observed from our results. Cell and device properties of our cross-point structure 8×8 array are reported. In addition, all fabrication processes were done at room temperature without other dedicated facilities or processes allowing for compatibility with current CMOS technology. Bi-stable switching for 1D-1R memory was demonstrated for our 2-stack cross-point structures showing excellent behavior for both diode and storage nodes. The forward current density for p-CuO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">X</inf> /n-IZO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">X</inf> diodes was over 10 4 A/cm 2 , and the operation voltage for the storage node with diode attached was around 3V.
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Lee et al. (2007) studied this question.
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