Modelling and Simulation of an Asymmetrical Modular Multilevel Inverter with Less Number of Components

This paper presents a modified topology for asymmetric modular multilevel inverter as a fundamental block. It consists of eight switches (including six bidirectional-conducting unidirectional-blocking switches and two bidirectional-conducting bidirectional-blocking switches) and four DC sources with unequal magnitudes, which generates 13-level output voltage. The proposed topology offers special features such as reduced number of switches, isolated DC sources, economical and less complexity with modular structure as compared to other contemporary topologies. Moreover, significant reduction in switch voltage can be achieved. The comparative study of proposed topologies with the conventional and recent topologies have been presented in terms of power switches, gate drivers, isolated DC voltage sources and total standing voltage on the switches. A multicarrier-based sinusoidal pulse width modulation scheme is adopted for generating the gate pulses using real-time simulation with dSPACE DS 1104. The proposed topology offers a fewer number of ON-state switches which lead to the reduction in power loss. The feasibility of proposed multilevel inverter, the simulation and experimental results are analysed under steady state and dynamic states.