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The design of high-current high-voltage MOSFET inverters requires measures to reduce the switching losses of the flyback diodes. Saturable reactances have been used in the case of a 4.5-kVA MOSFET inverter to limit the di/dt during commutations. The switching overvoltages of the reactances are absorbed by one common clamping circuit per bridge leg. The drive control system and the space vector modulator for the generation of the PWM switching sequences are implemented in a single-chip microcomputer.
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Holtz et al. (1987) studied this question.
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