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An operational six-transistor SRAM cell is experimentally demonstrated using Double Gate CMOS FinFET technology. A cell size of 4.8 /spl mu/m/sup 2/ was achieved in 180 nm node technology, with stable operation at 1.5 V using a single level of copper interconnect. To our knowledge this represents the first experimental demonstration of a fully integrated FinFET SRAM Cell.
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Nowak et al. (2003) studied this question.