A Recursive Hierarchy for Accelerator-Level Parallelism

The emergence, under the pressure of the ASICs imposed by the corporate space, of the field of Accelerator-Level Parallelism (ALP) requires a theoretical analysis to avoid the slippages that have characterized the evolutions of the last decades in the field of parallel computing. Ad hoc solutions imposed under time-to-market pressure have distorted the evolution of the field of parallel computing. The opportunity offered by the ALP challenge must be used to make last minute corrections in the chaotic evolution of the development of the parallel computing domain. The solution we propose is an attempt to reconsider parallelism from a double perspective. A purely theoretical one based on a mathematical model, that of the partially recursive functions proposed by Stephan Kleene, and another that emerges under the pressure of the increasingly complex applications demanded by the IT market. Our proposal consists in the hierarchical recursive structuring of ALP starting from the abstract MapScanReduce model that we have already proposed for the parallel computing.