A sub-0.5 μA/MB data-retention DRAM

This sub-0.5 /spl mu/A/MB data retention DRAM with relaxed junction biased (RTB), plate-floating leakage monitoring (PFM) and VBB biased pull down word line driver (PDPWD) extends retention time (T/sub RT/) about 3-times and reduces refresh current (I/sub RF/) to /spl les/0.4 /spl mu/A/MB. In addition, a gate-received VBB detector (GRD) and dynamically-controlled reference generators (DCRG) reduce dc retention current (I/sub DC/) to /spl les/0.1 /spl mu/A/MB. This DRAM allows a 20 MB RAM disk to retain data for 2.5 years with a single button-shaped 190 mAh lithium battery and can be substituted for SRAM.