Trace-based context-sensitive timing simulation considering execution path variations

We present a fast and accurate timing simulation of binary code execution on complex embedded processors. Underlying block timings are extracted from a preceding hardware execution and differentiated by execution context. Thereby, complex factors, such as caches, can be reflected accurately without explicit modeling. Based on timings observed in one hardware execution, timing of numerous other executions for different inputs can be simulated at an average error below 5% for complex applications on an ARM Cortex-A9 processor.