Passive charge redistribution digital‐to‐analogue multiplier

A digital‐to‐analogue multiplier based on the principle of passive charge sharing and redistribution is proposed. The circuit generates a voltage proportional to the multiplier, then samples this voltage with a capacitance proportional to the multiplicand by discharging the capacitance associated with its logical inverse. Parasitic capacitances are shown to result in an input‐referred offset with respect to the multiplier. The switching scheme is modified to null the offset. Simulation results are provided to verify the operation of the digital‐to‐analogue multiplier.