Programmable current-mode neural network for implementation in analogue MOS VLSI

This paper presents simple and efficient circuit techniques for the implementation of feedback and feedforward neural networks in analogue MOS VLSI. Synaptic weight storage is achieved using programmable threshold-voltage devices, such as the metal-nitride-semiconductor (MNOS) transistor and the floating-gate MOS (FGMOS) transistor. Basic electronic neural functions, such as adaptive weighted summation and sigmoidal nonlinearity functions, are implemented using simple current-mode analogue signal processing building blocks. This is particularly attractive when neural networks of increased complexity are implemented in modern scaled VLSI technologies, where voltage signal handling is severely limited for analogue applications. A four-neuron chip is designed, using the new current-mode building blocks, fabricated and experimentally verified using the MOSIS 2μm double-poly, double-metal p-well CMOS process. Intensive computer simulation and experimental results are provided.