Collaborative Design of Fault Diagnosis and Fault Tolerance Control Under Nested Signal Temporal Logic Specifications

Signal Temporal Logic (STL) is widely used for specifying complex time-dependent behaviors in cyber-physical systems (CPSs), particularly in safety-critical domains. However, fault diagnosis (FD) and fault tolerant control (FTC) under nested STL (NSTL) specifications remain challenging, especially for nonlinear systems. This paper proposes a collaborative design (CoD) framework that jointly integrates FD and FTC under NSTL constraints to enhance detection accuracy and ensure robust system performance. First, a fault detection observer is developed by constructing fault tolerant feasible sets that can predict whether ongoing system trajectories satisfy NSTL specifications. To address the feasibility issue in real-time control synthesis, we introduce the concept of fault tolerant control with recursive feasibility (FTCRF), enabling the controller to maintain constraint satisfaction and system stability even under faults. A model predictive control scheme guided by control barrier functions (CBFs) ensures safe trajectory tracking within specified bounds. Simulation studies on single integrator and unicycle models demonstrate the effectiveness of the proposed method in accurately detecting faults and maintaining task satisfaction under NSTL constraints.