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Neuromorphic computing based on computing-in-memory architectures requires device platforms capable of high-density integration, low power consumption, and precise analog weight modulation. Memtransistors, which integrate memristive and transistor functionalities within a single device, offer a hardware-efficient route toward compact artificial synapses. Among candidate channel materials, SiGeSn alloys provide unique advantages due to Sn-induced bandgap and strain engineering, mobility enhancement, and electrically tunable defect and short-range order (SRO) effects that enable nonvolatile analog conductance modulation. However, epitaxial growth of SiGeSn is challenged by low Sn solubility and lattice mismatch, necessitating Ge virtual substrates that introduce strain, which complicates intrinsic material characterizations, and leakage, which degrades device performance. Here, we developed a dual-layer epitaxial lift-off process to achieve large-area transfer of 44-nm Si0.08Ge0.85Sn0.07 nanoribbons, enabling strain-relaxed SiGeSn-on-insulator structures with smooth interfaces (RMS ∼0.76 nm) and void-free van der Waals bonding. The process exploits the high etching selectivity between Si and Ge in tetramethylammonium hydroxide, with the Ge buffer serving as an etch stop and subsequently removed through Raman-monitored etching. This approach yields clean SiGeSn-on-insulator structures without thermal or chemical degradation and effectively eliminates substrate-induced strain. Back-gated nanoribbon transistors exhibit ON/OFF ratios up to 1.82 × 103 and a peak hole mobility of 13.5 cm2/V s. With this platform, the investigation of SRO effects on electronic properties is enabled. Additionally, the capability of transferring the ribbons on arbitrary substrates enables its accurate material characterization and provides a scalable pathway for high-performance SiGeSn-based neuromorphic device applications.
Park et al. (Tue,) studied this question.