An integrated CAD system for algorithm-specific IC design

Lager, an integrated CAD (computer-aided design) system for algorithm-specific IC design, is described. It consists of a behavioral mapper and a silicon assembler. To generate a chip from a behavioral description, the user specifies both the behavioral description and a parameterized structural description. The behavior is mapped onto the parameterized structure to produce microcode and parameter values. The silicon assembler then translates the fill-out structural description into a physical layout. A number of algorithm-specific ICs designed with Lager have been fabricated and tested. A robot-control chip is described.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>