Low-temperature ALD-grown HfS2 for wafer-scale memristive device integration

Unlocking the potential of 2D materials like transition metal dichalcogenides (TMDCs) requires controllable, CMOS-compatible deposition techniques. Here, we report a wafer-scale, low-temperature atomic layer deposition (ALD) process for hafnium disulfide (HfS 2 ) and demonstrate its direct integration into functional memristive devices. To realize reliable device operation, we develop a passivation strategy that preserves the integrity of the HfS 2 layer throughout subsequent processing, addressing a key bottleneck in scalable 2D material integration. Raman spectroscopy, scanning transmission electron microscopy (STEM), energy dispersive X-ray spectroscopy (EDS), and X-ray diffraction (XRD) provide insights into the crystallographic structure of the HfS 2 layer, while electrical measurements reveal reproducible behavior across the entire wafer, indicating that conduction is dominated by trap-assisted transport. Altogether, these results establish a robust and reproducible platform for HfS 2 integration in a wafer-scaled memristive device technology toward scalable, CMOS-compatible 2D electronics.