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This paper presents an efficient test procedure for the detection of simultaneously present functional faults in semi-conductor random access memories (RAM's). The proposed procedure detects modeled types of functional faults using 36N + 24N log 2 N operations, which is an improvement over existing techniques. The testing process is twofold: first, it detects simple functional faults by a linear address marching. Second, it detects more complex types of functional faults by a nonlinear address sequencing approach. Simulation results to support the testing procedure are also presented.
Papachristou et al. (Fri,) studied this question.