An important and largely unexplored aspect of power distribution synthesis is cell customization. Through cell customization, power I/O cell assignments and local substrate and power supply decoupling may be tailored to reduce deleterious noise effects on analog circuits in mixed-signal environments. In this paper, we describe techniques for simultaneous power grid design (topology and sizing) and cell configuration/customization which allow designers to handle more difficult chip-level noise problems. We have incorporated this new approach in the power distribution synthesis tool RAIL and demonstrate its effectiveness on an industrial mixed-signal example.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Stanisic et al. (2002) studied this question.