Ising machines have shown great potential as efficient domain-specific accelerators for solving combinatorial optimization problems (COPs). Derived from quantum mechanics, simulated bifurcation (SB) achieves massive parallelism in updating the spin states in an Ising machine. Although SB speeds up the search for a solution compared to traditional simulated annealing, it requires more hardware resources since continuous variables are used for the positions of oscillators to obtain discrete spin states. In this article, lightweight quantized SB Ising machines (QSBMs) are developed to achieve a better tradeoff between search performance and hardware efficiency. In various quantization schemes, ternary and multiple-value quantized SB (qSB) algorithms discretize the position variables for the multiply-and-accumulate (MAC) operations in SB. The ternary qSB with dynamic threshold settings converts the MAC into addition, while uniform and logarithmic quantization schemes improve precision in the number representation when solving large-scale COPs. Three hardware-efficient QSBMs are subsequently designed with a fully connected topology. Synthesized on a Xilinx Virtex UltraScale+ field-programmable gate array (FPGA), the costly multiplication is implemented by using simple logic operators. Fully connected 2048-spin QSBMs use up to 50.8% fewer lookup tables and up to 82.5% fewer flip-flops than conventional FPGA-based SB machines. The QSBMs are superior in both long and short searches, respectively reaching 99. 1% and 98.5% of the best known solution in 1.46 <tex-math notation="LaTeX">$ms$</tex-math> and 0.73 <tex-math notation="LaTeX">$ms$</tex-math> on solving 2000-spin Ising problems.
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Zhang et al. (2025) studied this question.
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