High Gamma Value 3D-Stackable HK/MG-Stacked Tri-Gate Nanowire Poly-Si FETs With Embedded Source/Drain and Back Gate Using Low Thermal Budget Green Nanosecond Laser Crystallization Technology

Three-dimensional sequentially stackable high- <tex-math notation="LaTeX">k </tex-math> /metal-gate-stacked tri-gate nanowire poly-Si FETs with embedded source/drain (e-S/D) and back gate were demonstrated. The highly crystallized channel, fabricated by green nanosecond laser crystallization, chemical mechanical polish, and postsurface modification processes, enhances the electrical property of the tri-gate nanowire FET. The e-S/D structure reduces the contact and series resistances caused by the nanowire structure. Thus, the fabricated n/p-type tri-gate nanowire poly-Si FETs exhibit steep subthreshold swings (96/125 mV/decade), high ON-currents (232/110 <tex-math notation="LaTeX">μ A/μ m </tex-math> ), and <tex-math notation="LaTeX">I_ on/I_ OFF </tex-math> ratio ( <tex-math notation="LaTeX">> 10⁵) </tex-math> . Furthermore, the independent back gate with thin back gate oxide can easily adjust the threshold voltage of the tri-gate nanowire transistor and results in high gamma value (>0.05) FET realizing sequentially stacked and low <tex-math notation="LaTeX">Vdd </tex-math> (0.6 V) operable inverter.