Optimization of series resistance in sub-0.2 μm SOI MOSFETs

The optimization of device series resistance in ultra-thin film SOI devices is studied through 2-D simulations and process experiments. To achieve low series resistance, very thin silicides that do not fully consume the SOI film are needed. A novel cobalt salicidation technology using titanium/cobalt laminates is used to demonstrate sub-0.2 /spl mu/m, thin-film SOI devices with excellent performance and very low device series resistance.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>