A Compact Low-Power 28-nm FD-SOI CMOS 76–81 GHz Dual-Path Receiver With Phase Control for Automotive Applications

A 76–81-GHz dual-path receiver in 28-nm FD-SOI CMOS technology is presented for automotive radar applications. It introduces a new accurate phase control of phased-array radars using MOS varactors. The proposed solution is analytically described and implemented in the front-end low-noise amplifier (LNA) of each receiver path. It allows a maximum phase control of 23 <tex-math notation="LaTeX">∘</tex-math> with less than a 1 <tex-math notation="LaTeX">∘</tex-math> resolution for minimum degradation of the receiver performances. The receiver contains a two-stage LNA, a passive mixer, a local oscillator (LO) driver, and a baseband amplifier (BBA). The receiver achieves a 6.2 dB noise figure (NF) at 81 GHz. The receiver exhibits input compression points (ICPs <tex-math notation="LaTeX">1\,dB</tex-math> ) of <tex-math notation="LaTeX">$-$</tex-math> 29.5 and <tex-math notation="LaTeX">$-$</tex-math> 14.2 dBm with and without BBA, respectively. The active area of a single receiver path is only 0.057 mm <tex-math notation="LaTeX">²</tex-math> for a 46.1 mW power consumption and the active area of the dual-path receiver is 0.28 mm <tex-math notation="LaTeX">²</tex-math> .