The characteristics of hole trapping in HfO2∕SiO2 gate dielectrics with TiN gate electrode

The characteristics of charge trapping during constant voltage stress in an n-type metal–oxide–semiconductor capacitor with HfO2∕SiO2 gate stack and TiN gate electrode were studied. We found that the dominant charge trapping mechanism in the high-k gate stack is hole trapping rather than electron trapping. This behavior can be well described by the distributed capture cross-section model. In particular, the flatband voltage shift (ΔVfb) is mainly caused by the trap filling instead of the trap creation Zafar et al., J. Appl. Phys. 93, 9298 (2003). The dominant hole trapping can be ascribed to a higher probability for hole tunneling from the substrate, compared to electron tunneling from the gate, due to a shorter tunneling path over the barrier for holes due to the work function of the TiN gate electrode.