A 25Gb/s PAM4 transmitter in 90nm CMOS SOI

A 25 Gb/s multi-level PAM4 transmitter intended for short-range chip-to-chip on-board interconnects is presented. A 4-tap FIR pre-emphasis filtering scheme is used to equalize channel loss and to improve eye opening. Fabricated in a low-k partially depleted 90 nm SOI technology, it occupies 0.052 mm/sup 2/ and draws 99.3 mA from a 1 V supply.