Operation methods for high frame rate, linear response, wide dynamic range (DR) and high SNR in a CMOS image sensor are discussed. The high frame rate operation is realized by the optimum design of the floating diffusion capacitor, the lateral overflow integration capacitor, the column integration capacitor and the integration periods of multiple voltage and current readout operations. The color CMOS image sensor which consists of the 1/3-inch, 800H × 600V pixels and 5.6-μm pixel pitch with a buried pinned-photodiode, a transfer switch, a reset switch, a lateral overflow switch, a lateral overflow integration capacitor, a photocurrent readout switch, a source follower transistor and a pixel select switch in each pixel has been fabricated by 0.18-μm 2P3M CMOS technology. The image sensor operates the total frame rate of 13-fps with three-time voltage readout operations and one current readout operation and have realized full linear photoelectric conversion responses, over 20-dB SNR for the image of the 18-% gray card at all integration operation switching points and the over 200-dB DR.
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Ide et al. (2008) studied this question.
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