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Neuromorphic in-memory computing requires an area-efficient architecture for seamless and low-latency parallel processing of large volumes of data. Here, we report a compact, vertically integrated/stratified field-effect transistor (VSFET) consisting of a 2D nonferroelectric MoS2 FET channel stacked on a 2D ferroelectric In2Se3 FET channel. Electrostatic coupling between the ferroelectric and nonferroelectric semiconducting channels results in hysteretic transfer and output characteristics of both FETs. The gate-controlled MoS2 memtransistor is shown to emulate homosynaptic plasticity behavior with low nonlinearity, low epoch, and high accuracy supervised (ANN─artificial neural network) and unsupervised (SNN─spiking neural network) on-chip learning. Further, simultaneous measurements of the MoS2 and In2Se3 transistor synapses help to realize complex heterosynaptic cooperation and competition behaviors. These are shown to mimic advanced sensorimotor NN-controlled gill withdrawal reflex sensitization and habituation of a sea mollusk (Aplysia) with ultralow power consumption. Finally, we show logic reconfigurability of the VSFET to realize Boolean gates, thereby adding significant design flexibility for advanced computing technologies.
Sahoo et al. (Fri,) studied this question.