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June 4, 2026IEICE Electronics Express0 citationsOpen Access

High-precision LDO circuit design for SerDes systems

MLMeng LiShenyang University of TechnologyHFHao FanShenyang University of TechnologyBHBinghui HeShenyang University of Technology

Key Points

  • This design aims to improve high-speed interface circuit performance by developing a high-precision and low-ripple LDO using CMOS technology.
  • Implemented a low-dropout linear regulator based on 22nm CMOS technology.
  • Utilized a PMOS power transistor for superior transient response and noise performance.
  • Introduced a compensation capacitor and shunt technique to enhance stability and reduce output ripple.
  • Achieved an output accuracy with a single sigma deviation of only 0.3% at a load current of 40mA.
  • Reduced output ripple by 30% without using an external capacitor, meeting high precision and low offset requirements.

Abstract

To meet the requirements of high-speed interface circuits for high precision, low ripple, and high stability, a low-dropout linear regulator (LDO) with low offset and high precision based on CMOS 22nm technology is proposed. This design employs a PMOS power transistor to achieve superior transient response and noise performance. A self-biasing structure is adopted to isolates the operational amplifier from the load, reducing load interference and increasing the open-loop gain. Stability is enhanced by introducing a compensation capacitor at the tail current source, while a shunt technique is utilized to suppress output ripple. Simulation results show that with a load current of 40mA, the output accuracy has a single sigma deviation of only 0.3%. When no external capacitor is used, the shunt module can reduce ripple by 30%, meeting the requirements of high precision and low offset.

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Cite This Study

Li et al. (2026) studied this question.

synapsesocial.com/papers/6a211549d499ed480b16e8e7https://doi.org/10.1587/elex.23.20260248
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