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A new paradigm of predictive MOSFET and interconnect modeling is introduced. This approach is developed to specifically address SPICE compatible parameters for future technology generations. For a given technology node, designers can use default values or directly input L/sub eff/, T/sub ok/, V/sub t/, R/sub dsw/ and interconnect dimensions to instantly obtain a BSIM3v3 customized model for early stages of circuit design and research. Models for 0.18 /spl mu/m and 0.13 /spl mu/m technology nodes with L/sub eff/ down to 70 nm are currently available on the web. Comparisons with published data and 2D simulations are used to verify this predictive technology model.
Cao et al. (Thu,) studied this question.