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High-impedance fault location has always been a challenge for protection engineering. On the other hand, if this task is successfully realized, maintenance action could be performed in order to avoid potential injuries. For an effective protection scheme, high-impedance fault location should be performed, but a lack of research on this area is noted. This paper proposes a new analytical formulation for high-impedance fault location in power systems. The approach is developed in the time domain, considering a high-impedance fault model consisting of two antiparallel diodes. Using this model, the fault distance and parameters are estimated as a minimization problem. First, a linear least square-based estimator is applied without consideration of line capacitance. Second, a steepest descent-based estimator is proposed in order to consider the line capacitance. Studies were carried out with the IEEE 13 bus modeled in the Alternate Transients Program. Encouraging test results are found indicating the method's potential for real-life applications.
Iurinic et al. (Thu,) studied this question.