This paper presents a low-power, high-performance continuous-time ΣΔ modulator for MEMS microphones frontend. The ΣΔ modulator 3rd-order loop filter has been implemented with a low-noise, power-optimized active-RC architecture that uses only two operational amplifiers. This solution, along with the use of a 15-level quantizer and of a feedback DAC with three-level current-steering elements, which minimizes the noise contribution for small input signals, allows achieving a DR larger than 100 dB, while consuming less than 0.5 mW, as required in always-running audio modules for portable devices. The proposed ΣΔ modulator, realized in 0.16 μm CMOS technology with an area of 0.21 mm 2 , achieves 106 dB A-weighted DR and 91.3 dB peak SNDR, consuming 390 μW from a 1.6 V power supply.
No takes yet. Share an insight, caveat, or question.
Berti et al. (2016) studied this question.
Synapse has enriched 5 related papers. Consider them for comparative context: