Fault-tolerance amplification in line graphs: a framework for resilient PMU placement in power networks

The placement of Phasor Measurement Units (PMUs) is fundamental to achieving reliable observability in electric power networks, especially when measurements are subject to hardware failures or communication outages. Motivated by the need to understand how robustness behaves under different network representations, this paper studies the k-fault tolerant power domination number [Formula: see text] under the line graph transformation L(G). In this paper, we establish a correspondence between power domination in a graph and the induced monitoring process in its line graph, thereby linking vertex-based and edge-based perspectives on network observability. Within this dual framework, we prove the Fault-Tolerance Amplification Theorem, which states that if [Formula: see text] is a k-fault tolerant power dominating set of G, then the induced set in L(G) is Q-fault tolerant, where [Formula: see text]and [Formula: see text] are the [Formula: see text] smallest degrees among the vertices of [Formula: see text]. And Q attains its upper bound when [Formula: see text] is an independent k-fault tolerant power dominating set of G. These results provide a topology-aware framework for resilient PMU placement, clarifying when degree-based fault-tolerance amplification is valid and highlighting structural conditions under which additional care is required. We have validated our results with IEEE bus systems.